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MDCT IP core generator with architectural model simulation
Title MDCT IP core generator with architectural model simulation Author Malík Peter 1980 - SAVINFO - Ústav informatiky SAV SCOPUS RID ORCID Co-authors Baláž Marcel 1979- SAVINFO - Ústav informatiky SAV SCOPUS RID Pikula Tomáš SAVINFO - Ústav informatiky SAV SCOPUS Šimlaštík Martin SAVINFO - Ústav informatiky SAV Source document / Mir Salvador ; de Micheli Giovanni ; Reis Ricardo ; Simeu Emmanuel IFIP VLSI-SoC 2006 : proceedings : IFIP WG 10.5 international conference on very large scale integration & system-on-chip. S. 18-23. - Grenoble : International Federation for Information Processing, 2006 ; 14th IFIP WG 10.5 International Conference on Very Large Integration & System-on-Chip Language eng - English Country FR - France Document kind rozpis článkov z periodík (rzb) Citations KIM, Hi Seok - KIM, Sea Ho - CHUNG, Ki Soek - HAN, Tae Hee. Low power implementation of MDCT/IMDCT for MP3 audio decoder. In 2010 International SoC Design Conference, ISOCC 2010, 2010-12-01, pp. 143-146. Category ADMB - Scientific papers in foreign non-impacted journals registered in Web of Sciences or Scopus Category of document (from 2022) V3 - Vedecký výstup publikačnej činnosti z časopisu Type of document článok Year 2006 Registered in WOS Registered in SCOPUS DOI 10.1109/VLSISOC.2006.313286 
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