Automated generation of built-in self-repair architectures for random logic SoC cores

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Title	Automated generation of built-in self-repair architectures for random logic SoC cores
Author	Dobai Roland 1983- SAVINFO - Ústav informatiky SAV ^SCOPUS ^RID
Co-authors	Baláž Marcel 1979- SAVINFO - Ústav informatiky SAV ^SCOPUS ^RID
	Fischerová Mária 1955- SAVINFO - Ústav informatiky SAV ^SCOPUS

Source document	/ Smail Niar DSD 2012 : 15th Euromicro Conference on Digital System Design. P. 73-78. - Piscataway : IEEE, 2012 ; Euromicro Conference on Digital System Design DSD 2012
Language	eng - English
Country	US - United States of America
Document kind	rozpis článkov z periodík (rzb)
Citations	KINCEL, A. Test and Dependable Methods for RISC Processor. Master's Thesis, 2014.
Category	ADMB - Scientific papers in foreign non-impacted journals registered in Web of Sciences or Scopus
Category of document (from 2022)	V3 - Vedecký výstup publikačnej činnosti z časopisu
Type of document	článok
Year	2012
Registered in	SCOPUS
DOI	10.1109/DSD.2012.29

article

rok	CC	IF	IF Q (best)	JCR Av Jour IF Perc	SJR	SJR Q (best)	CiteScore
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rok vydania	rok metriky	IF	IF Q (best)	SJR	SJR Q (best)
2012

Number of the records: 1