Built-in self repair architecture generator for digital cores

Number of the records: 1

Title	Built-in self repair architecture generator for digital cores
Author	Krištofík Štefan 1984- SAVINFO - Ústav informatiky SAV ^SCOPUS ^RID ^ORCID
Co-authors	Baláž Marcel 1979- SAVINFO - Ústav informatiky SAV ^SCOPUS ^RID

Source document	IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems. Vol. (2016), p. 138-143
Language	eng - English
Country	SK - Slovak Republic
Document kind	rozpis článkov z periodík (rzb)
Citations	WU, Cheng-Hung - LIN, Sheng-Lin - LEE, Kuen-Jong - REDDY, Sudhakar M. A Repair-for-Diagnosis Methodology for Logic Circuits. In IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS. ISSN 1063-8210, 2018, vol. 26, no. 11, pp. 2254-2267.
Category	ADMB - Scientific papers in foreign non-impacted journals registered in Web of Sciences or Scopus
Category of document (from 2022)	V3 - Vedecký výstup publikačnej činnosti z časopisu
Type of document	článok
Year	2016
Registered in	WOS
Registered in	SCOPUS
DOI	10.1109/DDECS.2016.7482448

article

rok	CC	IF	IF Q (best)	JCR Av Jour IF Perc	SJR	SJR Q (best)	CiteScore
	N

rok vydania	rok metriky	IF	IF Q (best)	SJR	SJR Q (best)
2016

Number of the records: 1