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The refined efficient implementation of the MDCT in MP3 and comparison with other methods

  1. TitleThe refined efficient implementation of the MDCT in MP3 and comparison with other methods
    Author Britaňák Vladimír 1954-2020 SAVINFO - Ústav informatiky SAV    SCOPUS    RID
    Issue dataÚstav Informatiky SAV, Bratislava
    Languageeng - English
    CountrySK - Slovak Republic
    NoteProjekt VEGA č.2/1100/21
    Document kindmonografie
    ProjectČiastková správa Polyhedrálna aproximácia povrchov funkcií a kódovanie 1D, 2D a 3D signálov - 2/1100/21
    CitationsMALIK, Peter - BALAZ, Marcel - SIMLASTIK, Martin - LUCZYK, Arkadiusz - PLESKACZ, Witold. Various MDCT implementations in 0.35 mu m CMOS. In 2008 IEEE WORKSHOP ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS AND SYSTEMS, PROCEEDINGS, 2008, vol., no., pp. 170-173.
    MALIK, Peter - BALAZ, Marcel - PIKULA, Tomas - SIMLASTIK, Martin. An improved MDCT IP core generator with architectural model simulation. In Proceedings of the 2007 IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, 2007, vol., no., pp. 193-198.
    BALAZ, Marcel - MALIK, Peter - PIKULA, Tomas - SIMLASTIK, Martin. MDCT IP core generator. In IEEE DTIS: 2006 International Conference on Design & Test of Integrated Systems in Nanoscale Technology, Proceedings, 2006, vol., no., pp. 327-330.
    MALIK, Peter - BALAZ, Marcel - PIKULA, Tomas - SIMLASTIK, Martin. MDCT IP Core Generator with architectural model simulation. In IFIP VLSI-SoC 2006: IFIP WG 10.5 International Conference on Very Large Scale Integration & System-on-Chip, 2006, vol., no., pp. 18-23.
    SIMLASTIK, Martin - MALIK, Peter - PIKULA, Tomas - BALAZ, Marcel. FPGA implementation of a fast MDCT algorithm. In Proceedings of the 2006 IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, 2006, vol., no., pp. 228-229.
    MALIK, Peter. A generic IP core of the identical forward and inverse 12/36-point MDCT architecture and an architectural model simulation toolbox. In 2007 14TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS 1-4, 2007, vol., no., pp. 709-712.
    MALIK, Peter - UFNAL, Michal - LUCZYK, Arkadiusz W. - BALAZ, Marcel - PLESKACZ, Witold A. MDCT IMDCT Low Power Implementations in 90 nm CMOS Technology for MP3 Audio. In PROCEEDINGS OF THE 2009 IEEE SYMPOSIUM ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS AND SYSTEMS, 2009, vol., no., pp. 144-147.
    POHRONSKA, Maria - MALIK, Peter - BALAZ, Marcel. FPGA IMPLEMENTATION OF FULLY PARALLEL FAST MDCT ALGORITHM. In EUROCON 2009: INTERNATIONAL IEEE CONFERENCE DEVOTED TO THE 150 ANNIVERSARY OF ALEXANDER S. POPOV, VOLS 1- 4, PROCEEDINGS, 2009, vol., no., pp. 161-166.
    MALIK,P. Highly scalable IP core to accelerate the forward/backward modified discrete cosine transform in MP3 implemented to FPGA and low-power ASIC. In IET CIRC DEVICE SYST. ISSN 1751-858X, 2011, vol. 5, iss. 5, p. 351-359.
    MALÍK, P. Computational models designed in MATLAB to improve parameters and cost of modern chips. In MATLAB for engineers - applications in control, electrical engineering, IT and robotics. 2011, pp. 97-118.
    CHIPER, D.F. A hardware accelerator for the computation of modified discrete sine transform. In Annals of the Academy of Romanian Scientists Series on Science and Technology and Information. Online ISSN 2066-8562, 2021, vol. 14. no. 1-2, pp. 57-66.
    CategoryAGI - Reports on solved scientific and research tasks
    Year2002
    book

    book


Number of the records: 1  

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