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FPGA implementation of a fast MDCT algorithm
Title FPGA implementation of a fast MDCT algorithm Author Šimlaštík Martin SAVINFO - Ústav informatiky SAV Co-authors Malík Peter 1980 - SAVINFO - Ústav informatiky SAV SCOPUS RID ORCID Pikula Tomáš SAVINFO - Ústav informatiky SAV SCOPUS Baláž Marcel 1979- SAVINFO - Ústav informatiky SAV SCOPUS RID Source document / Novák Ondřej ; Kubátová Hana ; Kabalík Pavel ; Buček Jiří 2006 IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems : proceedings. S. 228-229. - Praha : Czech Technical University Publishing House ; 2006 IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems Language eng - English Country CZ - Czech Republic Document kind rozpis článkov z periodík (rzb) Citations LEI, S.F. - YAO, S.N. A memory-free modified discrete cosine transform architecture for MPEG-2/4 AAC. In IET CIRCUITS DEVICES & SYSTEMS. ISSN 1751-858X, 2010, vol. 4, no. 1, pp. 14-23. Dostupné na: https://doi.org/10.1049/iet-cds.2008.0214. Category AEC - Scientific papers in foreign peer-reviewed proceedings, monographs Category of document (from 2022) V2 - Vedecký výstup publikačnej činnosti ako časť editovanej knihy alebo zborníka Type of document príspevok Year 2006 Registered in WOS Registered in SCOPUS DOI 10.1109/DDECS.2006.1649620 
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rok vydania rok metriky IF IF Q (best) SJR SJR Q (best) 0
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